The invention relates to a semiconductor device comprising a semiconductor body having a first transistor provided with a first region forming a collector region or a drain region of the transistor, and with a second transistor provided with a second region forming a collector or drain region of the second transistor, which transistors are in a cascode configuration, the collector region or the drain region of the first transistor being connected to an emitter region or a source drain region of the second transistor. The invention also relates to a method of manufacturing such a device.
Such a device can be considered to be a type of divided transistor, with the first transistor being responsible for the current gain and the second transistor being responsible for the voltage gain.
Such a device, and such a method, are disclosed in United States patent specification U.S. Pat. No. 5,399,899, published on Mar. 21, 1995. Said document discloses a cascode configuration of two transistors, in which the semiconductor body comprises a stack of regions, the lower regions of which form the first, in this case bipolar, transistor and the superjacent regions form the second transistor, which is also a bipolar transistor. A connection of the base region of the first transistor is made possible in that parts of the semiconductor body situated around the second transistor are etched away as far as the base region, said region also serving as an etch stop.
A drawback of the known device resides in that, without modifications, it cannot readily be used as a xe2x80x9cdiscretexe2x80x9d transistor in a base station for mobile communication since this application requires a high power, a high (supply) voltage and a high speed. In addition, the known device cannot be readily manufactured owing to the use of an etch stop layer and the location of the electrical connections which are situated at two different levels.
Therefore, it is an object of the invention to provide a device which can particularly suitably be used for said application in a base station for mobile communication, and which can be readily manufactured.
To achieve this, a device of the type mentioned in the opening paragraph is characterized in accordance with the invention in that the first region and the second region are situated next to each other in a semiconductor region, a subjacent portion of which is provided, at the location of the first region, with a higher doping concentration. The invention is based first and foremost on the insight that by providing the first region in a smaller thickness than the second region, on the one hand, the cascode configuration is very suitable for supplying a high power of, for example, 100 W and for operation at a high (supply) voltage of, for example, 28 V and, on the other hand, can still operate at a very high speed. The first transistor, i.e. the xe2x80x9ccurrent amplifierxe2x80x9d thus is a transistor having a low BVceo (=collector-emitter breakdown voltage) and a high a (=cutoff frequency), and the second transistor, i.e. the xe2x80x9cvoltage amplifierxe2x80x9d has a high BVceo and a low fT. The invention is further based on the recognition that by placing the first and the second region next to each other within a single semiconductor region, it becomes possible to provide the electrical connections at one level. Finally, the invention is based on the important recognition that, if the first and the second region are placed next to each other and within a single semiconductor region, there is a simple method enabling the first and the second region to be provided with a different breakdown voltage. In accordance with this method, the slightly doped part of the collector region of the first transistor is provided in a smaller thickness than the slightly doped part of the collector region of the second transistor. As will be explained hereafter, said method comprises a combination of, for example, epitaxy and (local) ion implantation.
In a preferred embodiment of a device in accordance with the invention, the semiconductor body therefore comprises a semiconductor substrate on which an epitaxial layer is provided, which includes the semiconductor region. In a very favorable embodiment, the semiconductor body is attached to an insulating substrate by means of an adhesive layer, and the transistors are formed in mesa-shaped parts of the semiconductor body that is removed outside these parts. Such an insulation of the transistors ensures a minimum of additional/parasitic elements. As a result, the device in accordance with the invention is very fast. In addition, such a device can very suitably be embodied so as to be a SMD (=Surface Mounted Device), which enhances the compactness and hence also the speed. The electrical connection regions/connections of the cascode configuration are advantageously situated on the lower side, i.e. the semiconductor-substrate side, of the semiconductor body whose upper side adjoins the adhesive layer and the insulating substrate. Advantageously, the semiconductor body further comprises mesa-shaped recesses, which form (the remaining part of) the connection regions of the cascode configuration. The mesa-shaped parts are preferably provided with contact bumps, also referred to as xe2x80x9cbumpsxe2x80x9d, with a view to soldering and the SMD technique. This has the important additional advantage that a satisfactory heat dissipation, also of mesa-shaped parts which are not electrically connected, is ensured.
A method of manufacturing a semiconductor device comprising a semiconductor body having a first transistor provided with a first region forming a collector region or a drain region of the transistor, and a second transistor provided with a second region forming a collector region or a drain region of the second transistor, which transistors are in a cascode configuration, whereby the collector region or the drain region of the first transistor is connected to an emitter region or a source region of the second transistor, is characterized in accordance with the invention in that the first region and the second region are situated next to each other within a semiconductor region, a subjacent part of which is provided with a higher doping concentration at the location of the first region. In this manner, a device in accordance with the invention is achieved in a simple manner. Preferably, the semiconductor body is formed by providing a substrate with an epitaxial semiconductor layer, a part of which adjoining the substrate is locally provided with a higher doping concentration.
The epitaxial layer thus forms the semiconductor region and, for example by means of an ion implantation in the substrate, a local region is formed in advance, in the epitaxial layer, having a higher doping concentration within the semiconductor region, which ion implantation is subject to outdiffiusion during the subsequent epitaxial process, or during a separate diffusion step. The thickness of this local region will, in principle, be equal to that of the epitaxial layer. The method in accordance with the invention can be continued by growing a second epitaxial layer. In this manner, two adjacent regions are formed, which are equal in doping concentration but different in thickness. In such a two-step epitaxial process, it is possible to advantageously carry out, after the first step, a local ion implantation in the epitaxial layer grown in the first step, whereafter the second epitaxial layer is provided.
In an advantageous embodiment, the semiconductor body is glued onto an insulating substrate, after the formation of the transistors, whereafter mesa-shaped parts are formed in the semiconductor body at the location of the transistors by locally etching away the semiconductor body. Preferably, additional mesa-shaped parts are formed in the semiconductor body, which form the connection regions of the cascode configuration of the transistors, and all parts are provided with contact bumps.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiment(s) described hereinafter.